Program

Event Agenda

Room B1
Room B2
Room 305 — Hackathon
8.30 – 9.30

Check-in for Hackathon / Tutorials

9.30 – 10.30
10.30 – 11.30
11.30 – 12.30

9.30am · Room B1

Microwatt SAR ADC Design for Low Power Applications

Saman Fatima — NCDC, NUST

10.30am · Room B1

IP, Knowledge-Base Economy & Chip Design

Rashad Ramzan — FAST-NU Islamabad

11.30am · Room B1

ECOS Studio: An RTL-to-Chip Design Solution with Open-Source EDA, IP, and PDK

Hao Wang — Institute of Computing Technology, Chinese Academy of Sciences

9.30am · Room B2

A Custom Indigenous Framework for FPGA Software and Hardware Development

Fahad Al Ghazali — NECOP

10.00am · Room B2

Developing Tests for the RISC-V Certification Program

Ammara Wakeel — MEDS, UET Lahore

10.30am · Room B2

Design of Delta-Sigma Converters — A Circuit Perspective

Rana Shahid Jamil — NECOP

11.00am · Room B2

Giving Tiny Devices a Brain — Neural Networks on Edge Hardware

Nauman Latif & Rehan Hafiz — ITU

11.30am · Room B2

TCAM Emulation on FPGAs

Muhammad Irfan — GIKI

12.00pm · Room B2

Formal Property Verification

Ali Sajjad — 10xEngineers

Hackathon

9.30am – 12.30pm

Room 305

12.30 – 2.30

Namaz / Lunch

2.30 – 3.30
3.30 – 4.00
4.00 – 5.00
5.00 – 6.00
6.00 – 7.00

2.30pm · Room B1

DDR4-Based Memory Subsystem Verification in an Edge AI SoC

Hareem Rashid — Arcana Semiconductor

3.30pm · Room B1

Hardware Library Design with Chisel 3

Tariq Bashir — 10xEngineers / LUMS

4.00pm · Room B1

ASIC for Post Quantum Cryptography

Abid Rafique — ChipXPRT

Break / Tea / Networking

5.00 – 6.00pm

2.30pm · Room B2

A Systematic Approach to Scalable CSR Verification using UVM RAL

Muhammad Tahir & Kiran Shoaib — AQL Tech Solutions

3.30pm · Room B2

OSOC Programme and Design Flow: A User's Perspective

Ali Tahir & Muhammad Yousaf — MEDS, UET Lahore

4.00pm · Room B2

Designing Power-Ground Mesh

Saheer Sajid — DreamBig Semiconductor

4.30pm · Room B2

TLM & RTL Co-Simulation with QEMU

Sadeem Sajid & Bilal Baber — DreamBig Semiconductor

Break / Tea / Networking

5.00 – 6.00pm

Hackathon

2.30pm – 7.00pm

Room 305

7.00 – 7.30

Award Distribution

Room B1

8.00 – 9.00

Registrations

Lobby / Open Space

9.00 – 9.25

Welcome + 5 Year Review

Room B3

Ali Siddiqi — LUMS
Bilal Zafar — 10xEngineers

9.30 – 9.55

Keynote - Market Overview on AI and Semiconductors

Room B3

Jawad Haider — Intel, KSA

10.00 – 10.10

Sponsored Talks by GSME

GSME's Journey & Outlook

Room B3

Hafiz Azeem Abbas — GSME

10.10 – 10.20

Sponsored Talks by EpicSemi

Vision of Epic Semi and our product portfolio

Room B3

Mureed Bukhari — EpicSemi

10.20 – 10.30

Invited Talk

NECOP's efforts for IC Design Ecosystem of Pakistan

Room B3

Nasir Mohyuddin — NECOP

10.30 – 11.30

Coffee / Tea Break / Networking / Poster Session

Lobby / Open Space

11.30 – 12.20

Panel A: "Beyond the Hat" – The Youth Perspective

Room B3

Moderator: Umer Shahid
Panelists: Saad Khalil, Ammar Malik, Shahid Jamil, Hira Sohail, Talha Ahmed, Muhammad Irfan

12.20 – 12.30

Invited Talk

Tiny Bricks, Global Chips: Seeding IC Design across Pakistan, Oman, and KSA

Room B3

Rashad Ramzan — FAST NU Islamabad

12.30 – 12.40

Invited Talk

Semiconductor Design at NED University: Evolution, Ecosystem, and the Road Ahead

Room B3

Hashim Raza Khan — NEDUET

12.40 – 12.50

Invited Talk

Building Pakistan's Semiconductor Talent Pipeline: A Strategic Gateway to Global Chip Design and Innovation

Room B3

Faisal Jeddy — PSEB

1.00 – 2.00

Lunch / Namaz / Networking

Main Lobby

2.00 – 3.30

Technical Talks Session 1 (6 × 15 min, 6 slots)

Room B3

Technical Talks Session 2 (6 × 15 min, 6 slots)

Room B2

3.30 – 4.20

Tea / Networking / Poster Session

Main Lobby

4.20 – 5.15

Panel B: Regional Development and Lessons Learned

Room B3

Moderator: Bilal Zafar
Panelists: Waleed Alrajhi, Haroon-ur-Rasheed, Yu Zihao, Ahmad Alfifi, Jawad Haider, Henna Karamat, Bilal Abbasi

9.00 – 9.30

Keynote 2

Room B3

Sohail Naqvi

9.30 – 9.40

Sponsored Talk by 10xEngineers

10xEngineers: Five Years Journey

Room B3

Bilal Zafar — 10xEngineers

9.40 – 9.50

Invited Talk

3 Years of Running Semiconductor Training Programs: What Works & What Doesn't?

Room B3

Hammad Cheema — NUST Chip Design Centre (NCDC)

9.50 – 10.00

Invited Talk

Room B3

Ahmad Khan — Punjab Skill Development Fund

10.00 – 10.10

Invited Talk

IRADA – An Initiative to Drive Innovation in Niche Domains & Semiconductor Chip Design

Room B3

Omar Rashid — IRADA

10.30 – 11.30

Coffee / Tea Break / Networking / Booths / Poster Session

Lobby / Open Space

11.30 – 1.15

Technical Talks Session 3 (6 × 15 min, 7 slots)

Room B3

Technical Talks Session 4 (6 × 15 min, 7 slots)

Room B2

1.15 – 2.00

Lunch / Namaz / Networking

Main Lobby

2.00 – 2.10

Invited Talk

Strengthening Pakistan's Semiconductor Ecosystem: MERL-UITU's Initiatives and Impact

Room B3

Farhan Ahmed — MERL

2.10 – 2.20

Invited Talk

Driving Semiconductor Innovation: UET Lahore's Integrated Approach to Talent and Industry

Room B3

Muhammad Tahir — UET, Lahore

2.30 – 3.15

Panel C: Brain Drain vs. Brain Gain and the Startup Landscape

Room B3

Moderator: Yasir Javed
Panelists: Jafar Safdar, Faisal Iqbal, Muhammad Bilal, Mubashir Saleem, Soniya Shafi

3.15 – 4.00

Closing Ceremony and Awards Distribution

Session Details

The Emerging Talents Showcase offers students and early-career professionals a platform to present semiconductor projects and research to industry leaders. Participants submit a one-page abstract for an interactive session focused on technical feedback, mentorship, and career visibility.

Technical sessions provide a platform for industry experts and academics to share research and applied innovations across the semiconductor value chain. Participants deliver structured presentations based on technical papers to foster collaboration and showcase expertise within the national engineering ecosystem.

A research-oriented hackathon offers senior engineering and computer science students hands-on experience with FPGA and RTL design using professional or open-source EDA tools. Participants will navigate the chip design flow by performing specific tasks on pre-written designs and providing detailed technical analysis of their results.

The Tutorials Track at a national semiconductor summit offers 20–40 minute high-impact sessions led by experts to share technical workflows and emerging hardware technologies. Contributors must submit a 250–300 word abstract by March 6th focusing on industry-relevant education, ranging from RTL design to AI accelerators, to foster professional workforce development.